For the real-time processing scenario of high-bandwidth radar echo data, an optimization scheme for a streaming processing system based on FPGA is proposed. Focusing on the engineering implementation requirements under conditions of high throughput, low latency, and resource constraints, the overall system architecture is designed, and optimizations are carried out in three aspects: pipeline parallel computing, cache organization and memory access scheduling, and timing convergence under resource constraints. The system adopts a modular streaming data path, builds a collaborative mechanism between on-chip cache and computing units, reduces data transfer overhead, and improves the continuity and stability of the processing link. Experimental results show that the optimized system can operate stably under higher input bandwidth conditions, with improved throughput capacity and real-time processing performance, compressed critical path, and resource utilization remaining within a reasonable range. This research can provide a reference for the engineering implementation of high-bandwidth radar signal processing platforms.